Jeeru Dinesh Reddy

 

 

Name of Teaching Staff

Jeeru Dinesh Reddy

 
 

Designation

Assistant  Professor

 

Department

Electronics & Communication Engineering

 

Email ID

dineshreddy.ece@bmsce.ac.in

 

Date of Joining the Institution

22-09-2010

 

Qualifications with Class/Grade

UG

PG

PhD

I Class

Distinction

In Electronics Engineering

 

Total Experience in Years

Teaching

Industry

Research

6

5

2

 

Papers Published

National

International

1

9

 

Papers Presented in Conferences

National

International

1

3

 

PhD Guide? Give field & University

Field

University

VLSI

National Institute of Technology ,Surathkal

 

PhDs / Projects Guided

PhDs

Projects at Masters level

 

8

 

Books Published / IPRs/ Patents

Patent: “ Efficient utilisation of FPGA Fabric for PUF Designs”

 

Professional Memberships

IEEE-VLSI, IEEE-TIE,IESA,IEEE Blended Learning Program

 

Consultancy Activities

Chip-Edge Technologies (Training to bridge the industry-academia gap)

    Calligo Technologies Pvt. Ltd ( Handling Development with respect to Multicore support to CAD tools)

 

Awards

 
 

Grants fetched

 
 

Interaction with Professional

Institutions

India Electronic Semiconductor Association, Electronic Sector Skill Council of India.

NITK

 

Details of Publication: https://sites.google.com/view/jeerur/home

https://scholar.google.co.in/citations?user=TXQVdVYAAAAJ&hl=en

 

1.      Jeeru Dinesh Reddy; “System Verilog Based SOC Verification Environment for FLASH MEMORY” International conference on VCASAN-2013, Springer - publications, Volume 258, 2013 Jul-13

 

2.      J.Dinesh Reddy , K.N.Madhusudhan , Ashwini ; “ Implementation and optimization of 16x16 Luminance and 8x8 Chrominance Intra Prediction on FPGA” IJSHRE-2536, International journal,May-14

 

3.      J Dinesh Reddy Pavan Kumar.N.C ; “Memory Controller: A comparative study of SDRAM and DDR SDRAM controller” IJSETR Vol 3 Issue 5 May 2014 , International journal,May -14

 

4.      J Dinesh Reddy Pavan Kumar.N.C;  “Memory Controller: A comparative study of SDRAM and DDR SDRAM controller”, International Conference on Advanced trends in VLSI and Signal Processing ( ICAVSP-2014). International conference,June-14

 

5.      J Dinesh Reddy , Mahesh K.C , Pallavi , Harsha ;“FPGA implementation of USB to HDMI interface” PISER Journal, National journal, Jun-14

 

6.      J.Dinesh Reddy , K.N.Madhusudhan;  “A survey on security Measures implemented to detect burglary at the ATM”, IJRET journal, Volume 4, Issue 3; March 2015 , International journal,Jun-14

 

7.      J Dinesh Reddy , Chinmaya , Shashank , Vikram; “Comparative Analysis of FFT Algorithms for the Implementation of ASIC”, 2015 IEEE International Advance Computing Conference - 2015 IEEE International Advance Computing Conference, International conference,Mar,2015

 

8.      J Dinesh Reddy , Karthik Reddy; “ Domino CMOS Implementation of Power

Optimized and High Performance CLA adder”, International Journal of Science and Research (IJSR) N (Online): 2319-7064 Index Copernicus Value (2013): 6.14 | Impact Factor (2013): 4.438  Volume 4 Issue 5, May 2015 , International journal ,May-15

 

9.      J Dinesh Reddy , Karthik Reddy ; “ASIC Design and Implementation of UART with DFT logic for Built-in Self-test using Verilog HDL”, IJournals: International Journal of Software & Hardware Research in Engineering ISSN-2347-4890 Volume 3 Issue 5 May, 2015, International journal May-15

 

10.   Jeeru Dinish Reddy, Vishwaradhya B Yadrami,”Round-Robin Arbiter Based on Index for NoC Routers “, Dept. of ECE, BMS College of Engineering, Bengaluru, India yadramivishwa@gmail.com, dineshreddy.ece@bmsce.ac.in International Journal of Electrical Electronics & Computer Science Engineering  Special Issue - NEWS 2016 | E-ISSN : 2348-2273 | P-ISSN : 2454-1222 Available Online at www.ijeecse.com

 

11.   Jeeru Dinesh Reddy , Deepak S D, Design and Analysis of Low Power Open Core Protocol Compliant Interface Using Verilog. International Journal of Electrical Electronics & Computer Science Engineering  Special Issue - NEWS 2016 | E-ISSN : 2348-2273 | P-ISSN : 2454-1222 Available Online at www.ijeecse.com.

 

IEEE Transaction on Industrial Electronics  

12.   Jeeru Dinesh Reddy, Dr.K.P.Vittal , Anjana.S.Kumar, Anikethan.H.V.U IEEE Transactions on Industrial Electronics, communicated Journal Communicated “Implementation of Enhanced Parallel Port Interface for Frequency analysis in a Configurable Ring Oscillator PUF circuits on Xilinx Spartan 3E architecture”